High performance IIR filter implementation on FPGA

Abstract This paper presents an improved design of reconfigurable infinite impulse response (IIR) filter that can be widely used in real-time applications. The proposed IIR is realized by parallel–pipeline-based finite (FIR) filter. FIR filters have excellent characteristics such as high stability, linear phase and fewer precision errors. Hence, FIR-based more attractive selective signal processing. In addition, the other two modern techniques look-ahead two-level pipeline designs are also discussed. All said been described hardware description language tested on Xilinx Virtex-5 field programmable gate array board. implementation results show yields better performance terms utilization, higher operating speed lower power consumption compared to conventional